Here is the simple code for comparing conditional operator and if statement.
Code:
module testing;
reg foo;
wire [3:0] c1,c2,c3;
reg [3:0] a=1,b=3,cif1,cif2,cif3;
assign c1 = foo ? a : b;
//equality assign c2 = (foo==1) ? a : b;
//case equality assign c3 = (foo===1) ? a : b;
always@(foo...
Thursday, 2 November 2017
Tuesday, 31 October 2017
Hardware/Software cosimulation using Xilinx and Matlab
Technology has advanced, meanwhile software has become powerful. Xilinx & Matlab has worked together to bring hardware cosimulation, where some part of the code will be executing from Xilinx FPGA and input/output can be from Matlab. This is useful for audio, image and signal processing.
This video series describes the Hardware/Software cosimulation of verilog and VHDL coding inside FPGA...
Monday, 30 October 2017
Useful SED commands - Linux SED
While working in Linux, SED always plays important role in text processing. Here we've given some common examples of SED usage. Hope it will be a life saving that comes in handy!!!!!
Let us know your shortcuts/ commands in comment section below that saved your time...
Linux...
Tuesday, 7 June 2016
VERILOG TIMESCALE - TIMEFORMAT - EXAMPLE
In this post, let us see the timescale feature and system tasks that are available in Verilog HDL with brief examples.
`timescale directive specifies the time unit and time precision of the modules that follow it. The time unit is the unit of measurement for time values such as the simulation time and delay values.
Syntax: `timescale <time_unit>/<time_precision>
...
Tuesday, 5 April 2016
Perl – File Read Write Example
Perl – File Read Write
Example
In this post, let’s see how
to remove the new line character or line break in a text file and save the
result in another text file.
Refer to other posts File
handling, RegEx.
To accomplish the removal of
new line character, we use RegEx substitution...
Monday, 14 March 2016
Perl string manipulation with examples
Perl offers many easier ways to manipulate string, which is yet powerful with RegEx. In this post, the various functions available in Perl for string manipulation is explained with examples.
...
Saturday, 12 March 2016
Perl Regular expression - Perl RegEx with examples
A regular expression or RegEx is a string of characters that define the pattern or patterns you are viewing. The syntax of regular expressions in Perl is very similar to what you will find within other regular expression, supporting programs, such as sed, grep, and awk.
...
Friday, 11 March 2016
Glitch Free Clock Gating - verilog good clock gating
Clock gating is a popular technique used in many synchronous circuits for reducing dynamic power dissipation. This saves power by adding more logic to a circuit to the clock by disabling clock switching, so that the flip-flops in them do not have to switch states. As a result, the switching...
Wednesday, 23 December 2015
Download Verilog codes for SPI Master and Slave modules
Sharing below the links for SPI Verilog codes for Master and Slave modules.
SPI means Serial Pheripheral Interface, is a synchronous serial
data link operating in full
duplex mode.
For detailed information of the Verilog code of SPI Master and Slaves modules, proceed to the below links.
SPI MASTER SLAVE Verilog Code - SPI Working Modes of Operation - Applications - Advantages Disadvantages...
Monday, 2 November 2015
PERL TUTORIAL PART 4 - Working with files
FILE
HANDLING
The basics of handling files are simple, just associate a
filehandle with an external file and then use a variety of operators and
functions within Perl to read and update the data stored within the data stream
associated with the filehandle. The...
